Generally, a degradation degree of a transistor can be determined by measuring a drain current that results from voltages applied to a gate and drain.
FIG. 1 is an equivalent circuit of a test circuit for measuring a degradation degree of a transistor according to a related art. Referring to FIG. 1, in a test circuit for measuring a degradation degree of a transistor, prescribed voltages, e.g., 2 volts (V) and 4V, are applied to gate and drain electrodes, respectively. After applying an electrical stress to a transistor, a drain current as a device parameter of the transistor is detected to measure a degree of device degradation.
After completion of measuring the device parameter of the transistor for one electrical stress condition, a separate electrical stress condition, e.g., 5V drain voltage and 2.5V gate voltage, is applied to another transistor. A new drain current is then detected using a probe card to measure the degradation degree.
Thus, the degradation degree and lifetime of each transistor are measured by sequentially measuring drain currents of a plurality of transistors by applying the entire electrical stress conditions to be measured, respectively.
However, in case of measuring lifetimes of transistors by the test circuit in FIG. 1, the degradation degree should be measured in a manner of applying one electrical stress of one condition to one transistor each. Hence, it takes a considerable time (at least 3 hours) to find a time for seeking 10% drain saturation current (IDSAT) for each stress condition.
Moreover, because the device degradation of transistor should be measured under various conditions to measure an accurate lifetime of transistor, the time needed increases with the number of devices to be tested.